Integrated circuit design, semiconductor design, chip design or IC design, is a sub-field of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits (ICs). An IC consists of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.
IC design can be divided into the broad categories of digital and analog IC design. Digital IC design is to produce components such as microprocessors, FPGAs, memories (RAM, ROM, and flash) and digital ASICs. Digital design focuses on logical correctness, maximizing circuit density, and placing circuits so that clock and timing signals are routed efficiently. Analog IC design also has specializations in power IC design and RF IC design. Analog IC design is used in the design of op-amps, linear regulators, phase locked loops, oscillators and active filters. Analog design is more concerned with the physics of the semiconductor devices, such as gain, matching, power dissipation, and resistance. Fidelity of analog signal amplification and filtering is usually critical, and as a result, analog ICs use larger area active devices than digital designs and are usually less dense in circuitry.
Modern ICs are enormously complicated. An average desktop computer chip, , has over 20 billion transistors. The rules for what can and cannot be manufactured are also extremely complex. Common IC processes of 2015 have more than 500 rules. Furthermore, since the manufacturing process itself is not completely predictable, designers must account for its statistical nature. The complexity of modern IC design, as well as market pressure to produce designs rapidly, has led to the extensive use of tools in the IC design process, known as electronic design automation (EDA) tools. The design of some processors has become complicated enough to be difficult to fully test, and this has caused problems at large cloud providers. In short, designing an IC using EDA software consists of designing, testing, and verifying the instructions that the IC will carry out. Since logic chips such as general purpose processors are implemented out of logic gates, in theory, many software programs that run on general purpose processors such as CPUs or GPGPUs can be implemented directly in hardware as logic ASICs implementing the software as hardware logic gates. Doing the opposite is also possible. For example, in a bitcoin miner, video encoders and decoders, firewalls, DVD players, image/video processing in video switchers and cameras, AI and network routers,Stephen Lawson, InfoWorld. "Cisco's CRS-1 router reaches five-year milestone." May 27, 2009. Retrieved July 10, 2018. this can be used to increase computation speed or reduce product cost or cost per product operation by removing the abstraction provided by the ISA and microarchitecture of a general purpose processor, with the trade-off being reducing or eliminating the flexibility of software running on the chip, making major or all software updates impossible without creating a new chip tapeout as they are limited to one purpose or one specific operation. This technique is thus reserved for mass market, high performance applications, and applications of this technique such as NPUs and video codecs can be implemented in other processors such as hardware video acceleration and NPUs or tensor cores in general purpose processors. FPGAs can be used in place of low quantities of ASICs and are programmable.
Fundamentals
Integrated circuit design involves the creation of electronic components, such as transistors, resistors, capacitors and the interconnection of these components onto a piece of semiconductor, typically silicon. A method to isolate the individual components formed in the substrate is necessary since the substrate silicon is conductive and often forms an active region of the individual components. The two common methods are p-n junction isolation and dielectric isolation. Attention must be given to power dissipation of transistors and interconnect resistances and current density of the interconnect, contacts and vias, since ICs contain very tiny devices compared to discrete components, where such concerns are less of an issue. Electromigration in metallic interconnect and ESD damage to the tiny components are also of concern. Finally, the physical layout of certain circuit subblocks is typically critical, in order to achieve the desired speed of operation, to segregate noisy portions of an IC from quiet portions, to balance the effects of heat generation across the IC, or to facilitate the placement of connections to circuitry outside the IC.
Design flow
A typical IC design cycle involves several steps:
System specification Feasibility study and die size estimate Function analysis Architectural or system-level design Logic design Analogue design, simulation, and layout Digital design and simulation System simulation, emulation, and verification Circuit design Digital design synthesis Design for testing and automatic test pattern generation Design for manufacturability Physical design Floorplanning Place and route Parasitic extraction Physical verification and signoff Static timing Co-simulation and timing Mask data preparation (layout post-processing) Chip finishing with tape out Reticle layout Layout-to-mask preparation Reticle fabrication Photomask fabrication Wafer fabrication Packaging Die test Post silicon validation and integration Device characterization Tweak (if necessary) Chip deployment Datasheet generation (usually a PDF file) Ramp up Production Yield analysis / warranty analysis reliability Failure analysis on any returns Plan for next-generation chip using production information if possible
Focused ion beams may be used during chip development to establish new connections in a chip.
Summary Roughly speaking, digital IC design can be divided into three parts. Electronic system-level design: This step creates the user functional specification. The user may use a variety of languages and tools to create this description. Examples include a C/C++ model, VHDL, SystemC, SystemVerilog, transaction-level models, Simulink, and MATLAB. RTL design: This step converts the user specification (what the user wants the chip to do) into a register transfer level (RTL) description. The RTL describes the exact behavior of the digital circuits on the chip, as well as the interconnections to inputs and outputs. Physical circuit design: This step takes the RTL and a library of available logic gates (standard cell library) and creates a chip design. This step involves use of IC layout editor, layout and floor planning, figuring out which gates to use, defining places for them, and wiring (clock timing synthesis, routing) them together.
Note that the second step, RTL design, is responsible for the chip doing the right thing. The third step, physical design, does not affect the functionality at all (if done correctly) but determines how fast the chip operates and how much it costs.
A standard cell normally represents a single logic gate, a diode or simple logic components such as flip-flops, or logic gates with multiple inputs. The use of standard cells allows the chip's design to be split into logical and physical levels. A fabless company would normally only work on the logical design of a chip, determining how cells are connected and the functionality of the chip, while following design rules from the foundry the chip will be made in, while the physical design of the chip, the cells themselves, are normally done by the foundry and it comprises the physics of the transistor devices and how they are connected to form a logic gate. Standard cells allow chips to be designed and modified more quickly to respond to market demands, but this comes at the cost of lower transistor density in the chip and thus larger die sizes.
Foundries supply libraries of standard cells to fabless companies, for design purposes and to allow manufacturing of their designs using the foundry's facilities. A process design kit (PDK) may be provided by the foundry and it may include the standard cell library as well as the specifications of the cells, and tools to verify the fabless company's design against the design rules specified by the foundry as well as simulate it using the foundry's cells. PDKs may be provided under non-disclosure agreements. Macros/macrocells/macro blocks, macrocell arrays and IP blocks have greater functionality than standard cells, and are used similarly. There are soft macros and hard macros. Standard cells are usually placed following standard cell rows. General purpose processors such as GPGPUs and CPUs, and logic ASICs are implemented out of logic gates provided by the foundry as standard cells. The foundry will manufacture the chips based on the design of the standard cells, which are arranged by the fables customer into their own design for a logic ASIC or general purpose processor. For the foundry, the standard cells represent the circuit elements that will be manufactured using semiconductor device fabrication for the fabless customer.
Design lifecycle The integrated circuit (IC) development process starts with defining product requirements, progresses through architectural definition, implementation, bringup and finally production. The various phases of the integrated circuit development process are described below. Although the phases are presented here in a straightforward fashion, in reality, there is iteration and these steps may occur multiple times.
Requirements Before an architecture can be defined, some high-level product goals must be defined. The requirements are usually generated by a cross-functional team that addresses market opportunity, customer needs, feasibility, and much more. This phase should result in a product requirements document.
Architecture The architecture defines the fundamental structure, goals and principles of the product. It defines high-level concepts and the intrinsic value proposition of the product. Architecture teams take into account many variables and interface with many groups. People creating the architecture generally have a significant amount of experience dealing with systems in the area for which the architecture is being created. The work product of the architecture phase is an architectural specification.
Micro-architecture The micro-architecture is a step closer to the hardware. It implements the architecture and defines specific mechanisms and structures for achieving that implementation. The result of the micro-architecture phase is a micro-architecture specification that describes the methods used to implement the architecture.
Implementation In the implementation phase, the design itself is created using the micro-architectural specification as the starting point. This involves low-level definition and partitioning, writing code, entering schematics and verification. This phase ends with a design reaching tapeout.
Bringup After a design is created, taped-out and manufactured, actual hardware, 'first silicon', is received, which is taken into the lab where it goes through bringup. Bringup is the process of powering, testing and characterizing the design in the lab. Numerous tests are performed, starting from very simple tests such as ensuring that the device will power on, to much more complicated tests which try to stress the part in various ways. The result of the bringup phase is documentation of characterization data (how well the part performs to spec) and errata (unexpected behavior).
Productization