(EPI) was a strategic European project aiming to design and implement a roadmap for a new family of low-power European processors and accelerators for extreme scale computing, high-performance (HPC), Big Data, Edge and a range of emerging applications including AI and automotive.Terzo 2020.Langheim 2019.

The EPI project was divided into two phases, often referred to as Phase1/SGA1EC 2018. and Phase2/SGA2 referencing the Specific Grant Agreement legal framework. The first phase was implemented under the European Commission program Horizon 2020 (SGA1: 826647) from December 2018 to December 2021. The second phase was implemented following a EuroHPC Joint Undertaking call (H2020-JTI-EuroHPC-2020-02) by EuroHPCThe FPA was transferred to EuroHPC. See EuroHPC 2020. under Specific Grant Agreement No 101036168 (EPI SGA2), from January 2022 to March 2026. The project was co-funded by the European Union, partners’ Member States and Financing Authorities, and by internal partners’ funding.

The Core EPI objectives were the development of European microprocessors and accelerators to support European technological autonomy and sovereignty that will serve as central components of future European supercomputers to tackle societal challenges and boost innovation and the digital transformation of the European economy and science and compete on the global HPC market. In the second phase, the specific focus was to finalize the development of the first generation of low-power microprocessor units and accelerators to target the European Exascale machines, start developing the second generation, and ensure paths for industrialization and commercialization of these technologies.

The project was concluded in 2026 with some significant outcomes.Vukusić 2026b.

Technology The consortium developed its general-purpose processors (GPP) using ARM architectureDiez 2026. and accelerators based on RISC-V ISA and targeted integration in Bull Sequana systems. As part of EPI activities, in 2019, a company, SiPearl, was incorporated to become an industrial arm and commercialise the EPI GPP technology. EPI hardware design was strongly supported by collaborative hardware/software co-design and was complemented with comprehensive, full-stack software ecosystem development to support both GPP and accelerators. Together with flagship scientific applications that have been used to validate the developments,Suarez 2023. specific application target domains were selected for Phase 1 (automotive) and Phase 2 (AI) that could both benefit from and provide validation of new architectures.

Outcomes EPI demonstrated several results just after the Phase 2 end in 2026.EuroHPC Joint Undertaking (EuroHPC JU), "A great way to close the European Processor Initiative (EPI) project!", post on LinkedIn. SiPearl demonstrated the Rhea1 chip running a complete HPC software stack. The system booted on a test board, with a standard Linux distribution running with high-speed HBM memories and their associated hardware performance monitoring counters. It successfully executed the HPL and STREAM benchmarks, demonstrating the readiness of the complete Rhea1 hardware and software ecosystem for HPC workloads to power Exascale systems. Rhea1 features 80 arm® Neoverse V1 cores, more than 61 billion transistors (7.8 billion equivalent gates), built-in High Bandwidth Memory, with 4 stacks of HBM, 4 DDR5 interfaces supporting 2 DIMMs Per Channel, and 104 lanes of PCIe Gen5 interface: up to 6 x 16 lanes + 2 x 4 lanes. Rhea1 was selected for implementation in Jupiter, Europe’s first exascale supercomputer. The next version, Rhea2, was selected for implementation in Alice Recoque, the second European exascale supercomputer.

The project also demonstrated the EPAC (European Processor Accelerator) test-chip family,Mantovani 2026. gathering several IPs from several providers on the same chip: vpu – Vector Processing Unit - led by SemiDynamics and BSC stx – Stencil/Tensor accelerator – led by Fraunhofer vrp - Variable Precision Unit - led by CEA EPAC development resulted in the EPAC 1.5 test chip that was silicon-proven and in an additional full HPC cluster of the VEC accelerator mapped onto a multi-FPGA system built on the MEEP FPGA infrastructure. The project rolled out the reuse of EPAC IPs and tools in the next EuroHPC projects, like the DARE project.

Consortium partners have also developed further hardware-related IPs (Menta Origami EDA tool, ZeroPoint DenseMem memory compression, and Kalray KVX accelerators) – without going to silicon, as well as provided an open-source release of VPSim, the Virtual Prototyping Simulator by CEA-List, used for early software-hardware co-validation and performance exploration. Several European projects are using EPI results to implement further steps towards European technology sovereignty: EUPILOT, EUPEX and DARE.Vukusic 2026a.

Events Consortium organized and participated in a large number of events. The most prominent events were the two editions of the EPI Forum (Barcelona in 2024,"EPI Forum to open doors in Barcelona on October 9-11", Electronic specifier, read online"The EPI Forum. 9 and 10 October, 2024. Barcelona, Spain", Riser Project. Paris in 2025Anne-Françoise Pelé, "European Technological Sovereignty: Visionary or Illusory?", EETimes, 11.10.2025.) and the EPI Codesign Workshop in Heraklion in 2025."Highlights from the EPI Co-Design Workshop in Heraklion", Digital Autonomy with RISC-V in Europe, 20 September 2025."Mario Kovač at EPI Codesign Workshop", HPC Architecture and Application Research Center, Faculty of Electrical Engineering and Computing, Department of Control and Computer Engineering, University of Zagreb, 25 September 2026.

Members To execute the project, an EPI Consortium was built and then selected by the European Union’s Horizon 2020 programme, H2020-ICT-2017-2 calls under the topic ICT-42-2017 Framework Partnership Agreement in European low-power microprocessor technologies (FPA: 800928). The awarded Consortium consisted of European companies, universities, and research organisations, and was led by Bull in France. EPI is a non-legal entity, a consortium organized by 30 institutions from 10 countries in Europe. The members of the consortium were:Community Research and Development Information Service "SGA1 (Specific Grant Agreement 1) of the European Processor Initiative (EPI)". CORDIS Website. Luxembourg: EU Publications Office. https://cordis.europa.eu/project/id/826647 [lists partners and budget per partner]

+ Members of the EPI consortium Organization Type Industry Country Bull CompanyHigh-performance computing, artificial intelligence, quantum innovation BSC Public research center Supercomputing InfineonOnly participated to the Specific Grant Agreement 1 Company Semiconductors Semidynamics Company Semiconductors CEA Public research center Energy, defense, security, IT, health Chalmers University of Technology Private university Scientific and technological research, education ETH Zurich Public university Scientific and technological research, education Foundation for Research & Technology – Hellas Public research center Scientific and technological research GENCI State-owned company Supercomputing Tecnico Lisboa Public university Scientific and technological research, education Forschungszentrum Jülich Public research center Scientific and technological research University of Bologna Public university Scientific and technological research, education Faculty of Electrical Engineering and Computing, University of Zagreb Public university Scientific and technological research, education Fraunhofer Public research center Applied science STMicroelectronics Italy Company Semiconductors E4 Computer Engineering Company Engineering University of Pisa Public university Scientific and technological research, education Surf Public research center Scientific and technological research Kalray Company Semiconductors Extoll Company Semiconductors CINECA Public research center Scientific and technological research BMW Group Company Automobile Elektrobit Company Automobile, software Prove & Run Company Software Karlsruhe Institute of Technology Public university Scientific and technological research, education Menta Company Semiconductors SiPearl Company Semiconductors Kernkonzept Company Software LeonardoOnly participated to the Specific Grant Agreement 2 Company Software ZeroPoint Technologies Company Software

References

Bibliography (Diez 2026) Oscar Diez, Foundations of High-Performance Computing. A Comprehensive Guide to Systems, Concepts, and Programming, Amsterdam, London, Cambridge: Elsevier, 2026, ISBN 978-0-443-45574-2, p. 37. (Mantovani 2026) Filippo Mantovani, Fabio Banchelli, Pablo Vizcaino, Roger Ferrer, Oscar Palomar, Francesco Minervini, Jesus Labarta, Mauro Olivieri, Sebastiano Pomata, Pedro Marcuello, and others, "EPAC: The Last Dance" In: Hubertus Franke, Maurizio Palesi, Rubén Salvador, Estela Suarez (eds.), Proceedings of the 23rd ACM International Conference on Computing Frontiers: Workshops and Special Sessions}, ACM Digital Library, 2026, pp. 155-162, https://doi.org/10.1145/3801488. (Vukusić 2026b) Katarina Vukusić, "European Processor Initiative finishes second stage", Innovation News Network, 13 July 2026. (Vukusić 2026a) Katarina Vukusić, "European Processor Initiative’s path to innovative high-performance computing", Innovation News Network, 25 March 2026. (Suarez 2023) Estela Suarez, "Benchmarking and codesign. Examples from the DEEP and EPI projects ", ADAC Symposium, 2023, presentation on Association Aristote website. (EuroHPC 2020) EuroHPC JU 2020 ANNUAL WORK PLAN and BUDGET, pp. 7-8. (Terzo 2020) Mario Kovač, Jean-Marc Denis, Philippe Notton, Etienne Walter, Denis Dutoit, Franck Badstuebner, Stephan Stilkerich, Christian Feldmann, Benôt Dinechin, Renaud Stevens, Fabrizio Magugliani, Ricardo Chaves, Josip Knezović, Daniel Hofman, Mario Brčić, Katarina Vukusić, Agneza Šandić, Leon Dragić, Igor Piljić, Mate Kovač, Branimir Malnar, and Alen Duspara. "European Processor Initiative: Europe's Approach to Exascale Computing". In: Terzo, Olivier and Martinović, Jan (eds) HPC, Big Data, and AI Convergence Towards Exascale. Challenge and Vision, Boca Raton, Fla. & Abingdon, Oxon.: CRC Press, 2020, pp. 273-290, https://doi.org/10.1201/9781003176664 Michael Feldman. "European Processor Initiative Readies Prototype". The Next Platform. Boone, NC: January 27, 2020. https://www.nextplatform.com/2020/01/27/european-processor-initiative-readies-prototype/ (Langheim 2019) Mario Kovač, Dominik Reinhardt, Oliver Jesorsky, Matthias Traub, Jean-Marc Denis, Philippe Notton. "European Processor Initiative (EPI)—An Approach for a Future Automotive eHPC Semiconductor Platform". In: Langheim J. (eds) Electronic Components and Systems for Automotive Applications. Lecture Notes in Mobility. Springer, Cham. https://doi.org/10.1007/978-3-030-14156-1_15 pp 185-195 First online: 26 May 2019. https://link.springer.com/chapter/10.1007/978-3-030-14156-1_15 (Vukusić 2019) Michael Feldman. "First European Pre-Exascale Supercomputers Forgo Homegrown CPUs". The Next Platform. Boone, NC: November 20, 2019. https://www.nextplatform.com/2019/11/20/first-european-pre-exascale-supercomputers-forgo-homegrown-cpus/ [talks about the delay in EPI] Nitin Dahad. "European Processor Initiative Announces Common Platform For HPC." EE Times Europe. Ebersberg, Germany. November 5, 2019. https://www.eetimes.eu/european-processor-initiative-announces-common-platform-for-hpc/ Doug Black. "An Update on the European Processor Initiative". Inside HPC. 26 September 2019. https://insidehpc.com/2019/09/an-update-on-the-european-processor-initiative/