Opcode table

An opcode table (also called an opcode matrix) is a visual representation of all opcodes in an instruction set. It is arranged such that each axis of the table represents an upper or lower nibble, which combined form the full byte of the opcode. Additional opcode tables can exist for additional instructions created using an opcode prefix.

Table values The structure and arrangement of an opcode table appears as follows: 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 1 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 2 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 3 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 4 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 5 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 6 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 7 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F 8 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 9 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF C C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF

Each cell from 00–FF contains information about the operation such as the equivalent assembly instruction corresponding to the opcode, parameters, and CPU cycle counts.

Example opcode table This is the opcode table for the MOS Technology 6502 microprocessor from 1975. The 6502 uses 8-bit opcodes. Of the 256 possible opcodes available using an 8-bit pattern, the original 6502 uses only 151 of them, organized into 56 instructions with (possibly) multiple addressing modes. Because not all 256 opcodes are used, some opcode spaces are blank and the low nibble columns 3, 7, B, and F are missing from the table.

Opcode matrix for the 6502 instruction set Addressing modes: – accumulator, – immediate, – zero page, – absolute, – indirect, X – indexed by X register, Y – indexed by Y register, – relative High nibble Low nibble 0 1 2 4 5 6 8 9 A C D E 0BRKORA (ind,X) ORA zpgASL zpgPHPORA #ASL A ORA absASL abs 1BPL relORA (ind),Y ORA zpg,XASL zpg,XCLCORA abs,Y ORA abs,XASL abs,X 2JSR absAND (ind,X) BIT zpgAND zpgROL zpgPLPAND #ROL ABIT absAND absROL abs 3BMI relAND (ind),Y AND zpg,XROL zpg,XSECAND abs,Y AND abs,XROL abs,X 4RTIEOR (ind,X) EOR zpgLSR zpgPHAEOR #LSR AJMP absEOR absLSR abs 5BVC relEOR (ind),Y EOR zpg,XLSR zpg,XCLIEOR abs,Y EOR abs,XLSR abs,X 6RTSADC (ind,X) ADC zpgROR zpgPLAADC #ROR AJMP (ind)ADC absROR abs 7BVS relADC (ind),Y ADC zpg,XROR zpg,XSEIADC abs,Y ADC abs,XROR abs,X 8 STA (ind,X) STY zpgSTA zpgSTX zpgDEY TXASTY absSTA absSTX abs 9BCC relSTA (ind),Y STY zpg,XSTA zpg,XSTX zpg,YTYASTA abs,YTXS STA abs,X ALDY #LDA (ind,X)LDX #LDY zpgLDA zpgLDX zpgTAYLDA #TAXLDY absLDA absLDX abs BBCS relLDA (ind),Y LDY zpg,XLDA zpg,XLDX zpg,YCLVLDA abs,YTSXLDY abs,XLDA abs,XLDX abs,Y CCPY #CMP (ind,X) CPY zpgCMP zpgDEC zpgINYCMP #DEXCPY absCMP absDEC abs DBNE relCMP (ind),Y CMP zpg,XDEC zpg,X CLDCMP abs,Y CMP abs,XDEC abs,X ECPX #SBC (ind,X) CPX zpgSBC zpgINC zpgINXSBC #NOPCPX absSBC absINC abs FBEQ relSBC (ind),Y SBC zpg,XINC zpg,XSEDSBC abs,Y SBC abs,XINC abs,X

References

Opcode table

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