In computing, energy proportionality is a measure of the relationship between power consumed in a computer system, and the rate at which useful work is done (its utilization, which is one measure of performance). If the overall power consumption is proportional to the computer's utilization, then the machine is said to be energy proportional. Equivalently stated, for an idealized energy proportional computer, the overall energy per operation (a measure of energy efficiency) is constant for all possible workloads and operating conditions.
The concept was first proposed in 2007 by Google engineers Luiz André Barroso and Urs Hölzle, who urged computer architects to design servers that would be much more energy efficient for the datacenter setting.
Energy proportional computing is currently an area of active research, and has been highlighted as an important design goal for cloud computing. There are many technical challenges remaining in the design of energy proportional computers. Furthermore, the concept of energy proportionality is not inherently restricted to computing. Although countless energy efficiency advances have been made in non-computing disciplines, they have not been evaluated rigorously in terms of their energy proportionality.
Background in energy sustainability
Sustainable energy is the ideal that society should serve its energy needs without negatively impacting future generations, and which various organizations, governments, and individuals have been advocating. To meet this ideal, efficiency improvements are required in three aspects of the energy ecosystem: Energy generation Energy storage Energy consumption
Since our need for energy generation and storage are driven by our demand, more efficient ways of consuming energy can drive large improvements in energy sustainability. Efforts in sustainable energy consumption can be classified at a high level by the three following categories: Recycle: Capture and recover wasted energy to do more work, that would otherwise be lost as heat. Reuse: Amortize the cost of energy generation, storage, and delivery by sharing energy and its infrastructure among different loads. Reduce: Reduce demand for energy by doing more work with less energy (improve consumption efficiency), or not doing the work at all by changing behavior.
Many efforts in making energy consumption more sustainable are focused on the "reduce" theme for unpredictable and dynamic workloads (which are commonly encountered in computing). This can be considered as power management. These efforts can be lumped into two general approaches, which are not specific to computing, but commonly applied in that domain: Idle power-down: This technique exploits gaps in workload demand to shut off components that are idle. When shut down, components cannot do any useful work. The problems unique to this approach are: (1) it costs time and energy to transition between active and idle power-down states, (2) no work can be done in the off state, so power-up must be done to handle a request, and (3) predicting idle periods and adapting appropriately by choosing the right power state at any moment is difficult. Active performance scaling: Unlike idle-power down, this approach allows work to be done in any state, all of which are considered active, but with different power/performance tradeoffs. Usually, slower modes consume less power. The problems unique to this approach are: (1) it is difficult to determine which combination of states is the most energy efficient for an application, and (2) the energy efficiency improvements are usually not as lucrative as those from idle power-down modes.
In practice, both types of approaches are used commonly and mixed together.
Motivation for energy proportionality
Until about 2010, computers were far from energy proportional for two primary reasons. A critical issue is high static power, which means that the computer consumes significant energy even when it is idle. High static power is common in servers owing to their architectural, circuit, and manufacturing optimizations that favor very high performance instead of low power. High static power relative to the maximum loaded power results in low dynamic range, poor energy proportionality, and thus, very low efficiency at low to medium utilizations. This can be acceptable for traditional high-performance computing systems and workloads, which try to extract the maximum utilization possible out of the machines, where they are most efficient. However, in modern datacenters that run popular and large-scale cloud computing applications, servers spend most of their time around 30% utilization, and are rarely running under maximum load, which is a very energy-inefficient operating point for typical servers.
The second major reason is that the various hardware operating states for power management can be difficult to use effectively. This is because deeper low power states tend to have larger transition latency and energy costs than lighter low power states. For workloads that have frequent and intermittent bursts of activity, such as web search queries, this prevents the use of deep lower power states without incurring significant latency penalties, which may be unacceptable for the application.
Energy proportional computer hardware could solve this problem by being efficient at mid-utilization levels, in addition to efficient peak performance and idle states (which can afford to use deep low power sleep modes). However, achieving this goal will require many innovations in computer architecture, microarchitecture, and perhaps circuits and manufacturing technology. The ultimate benefit would be improved energy efficiency, which would allow for cheaper computer hardware, datacenter provisioning, power utility costs, and overall total cost of ownership (TCO).
Research in energy proportional computing
Since Barroso and Hölzle's 2007 paper in IEEE Computer, many researchers have begun to address the problem of energy proportional computing in a variety of ways and in different components.
CPU
The CPU was the first and most obvious place for researchers to focus on for energy efficiency and low power. This is because traditionally it has been the biggest consumer of power in computers. Owing to many innovations in low power technology, devices, circuits, microarchitecture, and electronic design automation, today's CPUs are now much improved in energy efficiency. This has led to the situation where CPUs no longer dominate energy consumption in a computer.
Some more well-known examples of the many innovations in CPU energy efficiency include the following: Clock gating:V. Tiwari, D. Singh, S. Rajgopal, G. Mehta, R. Patel, and F. Baez, "Reducing power in high-performance microprocessors," in Proceedings of the 35th annual conference on Design automation conference - DAC '98. New York, New York, USA: ACM Press, May 1998, pp. 732–737. [Online]. Available: http://dl.acm.org/citation.cfm?id=277044.277227Q. Wu, M. Pedram, and X. Wu, "Clock-gating and its application to low power design of sequential circuits," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 47, no. 3, pp. 415–420, Mar. 2000. [Online]. Available: https://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=841927N. H. E. Weste and D. M. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, 4th ed. Addison-Wesley, 2011. The clock distribution to entire functional units in the processor is blocked, thus saving dynamic power from the capacitive charging and discharging of synchronous gates and wires. Power gating:Z. Hu, A. Buyuktosunoglu, V. Srinivasan, V. Zyuban, H. Jacobson, and P. Bose, "Microarchitectural techniques for power gating of execution units," in Proceedings of the 2004 international symposium on Low power electronics and design - ISLPED '04. New York, New York, USA: ACM Press, Aug. 2004, p. 32. [Online]. Available: http://dl.acm.org/citation.cfm?id=1013235.1013249 Entire functional units of the processor are disconnected from the power supply, thus consuming effectively zero power. Multiple voltage domains: Different portions of the chip are supplied from different voltage regulators, such that each can be individually controlled for scaling or gating of the power supply. Multi-threshold voltage designs: Different transistors in the design use different threshold voltages in order to optimize delay and/or power. Dynamic frequency scaling (DFS): The clock frequency of the processor is adjusted statically or dynamically to achieve different power/performance tradeoffs. Dynamic voltage scaling (DVS): The supply voltage of the processor is adjusted statically or dynamically to achieve different power/reliability/performance tradeoffs. Dynamic voltage/frequency scaling (DVFS):S. Herbert and D. Marculescu, "Analysis of dynamic voltage/frequency scaling in chip-multiprocessors," in Proceedings of the 2007 international symposium on Low power electronics and design - ISLPED '07. New York, New York, USA: ACM Press, 2007, pp. 38–43. [Online]. Available: http://portal.acm.org/citation.cfm?doid=1283780.1283790 Both voltage and frequency are varied dynamically to achieve better power/performance tradeoffs than either DFS or DVS alone can provide.
Note that all of the above innovations for CPU power consumption preceded Barroso and Hölzle's paper on energy proportionality. However, most of them have contributed some combination of the two broad types of power management mentioned above, namely, idle power-down and active performance scaling. These innovations have made CPUs scale their power relatively well in relation to their utilization, making them the most energy-proportional of computer hardware components. Unlike CPUs, most other computer hardware components lack power management controls, especially those that enable active performance scaling. CPUs are touted as a good example of energy-proportional computer engineering that other components should strive to emulate.
Memory
Memory was cited as one of the major system components that has traditionally been very energy disproportional. Memory tends to have relatively high static power due to extremely high transistor counts and densities. Furthermore, because memory is often left idle either due to cache-friendly workloads or low CPU utilization, a large proportion of energy use is due to the static power component.
Traditionally, dynamic voltage and frequency scaling on main memory DRAM has not been possible due to limitations in the DDR JEDEC standards. However, these limitations exist because the conventional wisdom in memory design is that large design margins are needed for good yield under worst-case manufacturing process variations, voltage fluctuations, and temperature changes. Thus, scaling voltage and frequency, which is commonly done in CPUs, is considered difficult, impractical, or too risky for data corruption to apply in memories.