Automatic Device Model Synthesizer (ADMS) is public domain software used in the semiconductor industry to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator, Ngspice, and HSpice.
Overview ADMS stands for Automatic Device Model Synthesizer. ADMS can be used to turn Verilog-A compact modelsTransistor model#Models for circuit design .28compact models.29 into C code. ADMS interpreter parses a Verilog-AMS file to build a data tree. XML filters are applied on the tree to generate the output files.
ADMS aims to reduce the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use the vendor-neutral language Verilog-A for model definition, improving robustness and maintainability.
ADMS is used by the open source SPICE simulator NGSPICE to support a number of compact models. Following models are supported by NGSPICE using ADMS: MOS EKV (LEVEL=44) MOS PSP102 (LEVEL=45) BJT Mextram 504 (LEVEL=6) BJT Hicum0 (LEVEL=7) BJT Hicum2 (LEVEL=8)
The upstream version of the original ADMS project hasn't been updated since version 2.3.0. The Qucs project has created a fork of ADMS that is still being used as code generator to generate models of compact devices written in Verilog-AMS into source code for the SPICE simulator. The maintained fork only supports a subset of Verilog-AMS language.
ADMS is still part of electronic-circuit simulation software. According to the documents of the ngspice project, ADMS is used to convert Verilog-AMS compact models to C for integration with ngspice.
Limitations
ADMS only parses a subset of Verilog-A, and not all statements are supported by all XML filters. Specifically, current controlled voltage sources are not supported in most filters targeting SPICE simulators: V(..) <+ I(..) // doesn't work with NGSPICE Instead, this needs to be represented as a conductance expression (and not impedance). i.e. I(..) <+ V(..) I (..) probes don't work with NGSPICE Some other language constructions need to be supported in the filter as well for loop, case statement. Many language features are hard to support with ADMS filters laplace_transform, idt, switching branches. Important aspects of code generation are close to impossible with ADMS dataflow analysis code optimisation, and ADMS is extremely slow (which can be seen on slightly larger models).
See also Verilog-A SPICE GNU Circuit Analysis Package
References
External links EKV MOSFET Model: Industry Standard Model for Analog/RF IC (2007) adms (download) A Platform for Compact Model Sharing! (A project started in 2011) The i-MOS Project: An Open Platform for Device Modeling and Circuit Simulation (archived 2014)