Ferranti's Argus computers were a line of industrial control computers offered from the 1960s into the 1980s. Originally designed for a military role, a re-packaged Argus was the first digital computer to be used to directly control an entire factory. They were widely used in a variety of roles in Europe, particularly in the UK, where a small number continue to serve as monitoring and control systems for nuclear reactors.
Original series Blue Envoy, hearing aid computer The original concept for the computer was developed as part of the Blue Envoy missile project. This was a very long-range surface-to-air missile system with a range on the order of . To reach these ranges, the missile was "lofted" in a nearly vertical trajectory at launch, flying as quickly as possible to high altitude where it suffered less drag during the subsequent long cruise toward the target. During the vertical climb, the missile's internal radar would not be able to see the target, so during this period it was command guided from the ground.
Argus began as a system to read the radar data, compute the required trajectory, and send that to the missile in-flight. The system not only had to develop the trajectory, but also directly controlled the control surfaces of the missile and thus had a complete control feedback system. Development was carried out by Maurice Gribble at Ferranti's Automation Division in Wythenshawe starting in 1956. The system used OC71 transistors from Mullard, originally designed for use in hearing aids. They could only be run at the low speed of 25 kHz, but this was enough for the task.
Blue Envoy was cancelled in 1957 as part of the sweeping 1957 Defence White Paper. Ferranti decided to continue the development of the computer for other uses. During a visit by Prince Philip, Duke of Edinburgh in November 1957, they set up a system with an automotive headlamp connected to a handle that could be moved by hand to shine at any point on a wall, while the computer attempted to move a second headlamp to lay on the same spot on the wall.
Prototype Argus Ferranti continued development of the system, and during 1958 they completed a prototype of a commercial product which they showed publicly for the first time at the Olympia in November. This machine used new circuitry that ran at the much faster rate of 500 kHz. The name "Argus" (from the Greek God of that name) was assigned the next year, keeping with the Ferranti tradition of using Greek names for their computers. They selected Argus as this was the all-seeing god, appropriate for a machine that would be tasked with controlling complex systems.
The new system had a number of differences from the hearing aid machine. Among these was the introduction of interrupts to better handle timing of various events. The earlier machine was so slow that these sorts of issues were dealt with simply by checking every physical input in a loop, but with the much faster performance of the new design this was no longer appropriate as most of the tests would reveal no changes and thus be wasted. These sorts of tasks were now controlled by interrupts, so the device could indicate when its data was ready to be processed. The system added core memory for temporary storage, replacing the flip-flops from the earlier system, and added a plugboard for programming.
The first delivery would be to Imperial Chemical Industries (ICI) to go into use as the control system for ICI's soda ash/ammonia plant at Fleetwood. An agreement was reached in March 1960 and the machine was installed April/May 1962. This was the first large factory to be controlled directly by a digital computer."Process-control computers make a hit with chemical manufacturers", New Scientist, 15 October 1964, p. 165"Process Control: Concepts Dynamics And Applications", PHI Learning, 2010, p. 490 Other European sales followed.
The Argus circuitry was based on germanium transistors with 0 and -6 volts representing binary 1 and 0, respectively. The computer was based on a 12-bit word length with 24-bit instructions. The arithmetic was handled in two parallel 6-bit ALUs operating at 500 kHz. Additions in the ALU took 12 μs, but adding in the memory access time meant simple instructions took about 20 μs. Double-length (24-bit) arithmetic operations were also provided. Data memory was supplied in a 12-bit, 4096 word, core memory store. Program code was stored in a plugboard, where small ferrite pegs dropped into holes produced a "1" when read. Each board had enough room for 64 instructions, which were then stacked 8 trays to a box and 4 boxes in a rack, providing up to 2048 instructions. Opcodes were 6 bits, registers 3 bits, index register (modifier) 2 bits and data address 13 bits."Ferranti Argus: Process-Control Computer System", Ferranti, 1961
Bloodhound Mark II Shortly after the cancellation of the Blue Envoy in 1957, an emergency meeting between the primary contractors, Ferranti and Bristol Aerospace, led to the idea of combining components of the Blue Envoy with the existing Bristol Bloodhound to produce a much more capable design. This produced the Bloodhound Mark II, roughly doubling the range to about and using the new radar systems from the Envoy which allowed the missile to track targets much closer to the ground whilst also much more resistant to radar jamming.
Unlike Blue Envoy, Bloodhound was expected to be able to see the target through the entire attack. Guidance was semi-active radar homing, with an illuminator radar lighting up the targets, and a receiver in the missile using the reflected signal to track. For this to work, the illuminator had to be pointed at the target using information from a separate tactical control radar, and the receiver in the nose of the missile had to be pointed at the target. The illuminator and missiles would not necessarily be close together, complicating the calculations. Further, the receiver had to filter out signals that were not of the expected Doppler shifted frequency range, so the computer also had to calculate the expected frequency shift to set the receiver's filters.
The accuracy required of the calculations was beyond the capability of small military computers used to that point. An experimental system by Derek Whitehead using a digital computer was easily able to accomplish the calculations. He suggested placing the computers at the Orange Yeoman radar sites as calculation centers that would feed this information to the missile batteries.
Whitehead was a friend of Gribble's and was aware of his work on a small computer, and first raised the issue sometime in autumn 1959. Once the decision had been made to move to a digital computer, all sorts of secondary tasks were handed off to the machine. This included everything from maintenance testing to missile launch control to the calculation of Doppler "zero points" where the signal would be expected to drop to zero as the target crossed at right angles to the radar.
Argus 200 and 100 The original design was followed in 1963 by the single-ALU Argus 100, which cost around £20,000 (equivalent to approximately £430,000 ). Unlike the original, the Argus 100 used a flat 24-bit addressing scheme with both data and code stored in a single memory. A smaller 5-bit opcode was used in order to simplify the basic logic and gain an address bit. The single ALU and other changes resulted in a basic operation time of 72 μs. One notable use of the Argus 100 was to control the Jodrell Bank Mark II telescope in 1964. With the 100's release, the original design was retroactively renamed Argus 200.
The Argus 200 model would eventually sell 63 machines, and the 100 14.
Argus 300
The design of the Argus 300 was started in 1963, with the first delivery in 1965. This was a much faster machine featuring a fully parallel-architecture arithmetic logic unit, as opposed to the earlier and much slower serial units. Its instruction set was nevertheless fully compatible with the Argus 100. The 300 was very successful and used throughout the 1960s in various industrial roles.
A variant of the 300 was the Argus 350, which allowed external access to its core to allow direct memory access. This improved performance of input/output, avoiding having to move data via code running on the processor. The 350 was used in various military simulators, including the Royal Navy for frigate, submarine and helicopter-based anti-submarine training, and the Royal Air Force for a Bloodhound Mk.II simulator and the Vickers VC10 flight simulator built at Redifon and delivered to RAF Brize Norton in 1967. The model used on the VC10 Simulator was a 3520B, this meant that it had 20,000 words of memory and a Backing Store. Redifon also used the 350 on the Air Canada DC9 flight simulator that was installed in Montreal in the Spring of 1966. The 350's were delivered in the 1967 to 1969 timeframe.
Silicon replacements The design of the Argus 400 started at the same time as the Argus 300. In logical terms the 400 was similar to the earlier 100, using serial ALUs. However, it featured an entirely new electrical system. Previous machines used germanium transistors to form the logic gates. The Argus 400 used silicon transistors in a NOR-logic designed by Ferranti Wythenshawe called MicroNOR II, with more "conventional" logic where 0 and +4.5 represented binary 1 and 0, respectively. The rest of the world however used 0 volts to represent 0 and + 2.4 (to 5) volts to represent 1. This was called NAND logic. They are in fact both the same circuitry. When Texas Instruments brought out their “74” series of integrated circuits the specification of MicroNOR II was changed from 4.5 volts to 5 volts so the two families could work together. The machine was packaged to fit into a standard Air Transport Rack. Multilayer PCBs were not routine in 1963 and Ferranti developed processes for bonding the boards and plating through the circuit boards. The drawing office had to learn how to design multilayer boards, which was first laid out on tape then transferred to film. It took around two years for the Argus 400 to go into production, with the first delivery in 1966, weighing more than .Weight of central unit 7 kg and power unit 6 kg
The Argus 500, designed about 3 years later, used parallel arithmetic and was much faster. It was designed to be plugged into a larger 19 inch rack mounted frame, together with up to four core store (memory) units. The Argus 400 was repackaged to be the same as the Argus 500 and the two machines were plug compatible. The Argus 400 used 18 small PCBs for its CPU each of which was wire-wrapped to the backplane using 70 miniature wire wraps. Removing a card was tedious. The Argus 500 initially used the same packages, and also wire-wrap, on larger boards, but later versions employed dual-in-line ICs which were soldered flat onto the PCB and were much easier to remove.
Like the earlier designs, the 400 and 500 used the same 14-bit address space and 24-bit instruction set and were compatible. The 500 added new instructions that used three-bits of the accumulator for offset indexing as well. Both machines ran at a 4 MHz basic clock cycle, much faster than the earlier machines' 500 kHz. Both used core memory which was available in two cycle times. The Argus 400 used a 2 μs core whereas the Argus 500 had 2 μs in earlier machines and 1 μs for later ones, doubling performance. The difference between the 400 and 500 was similar to the split between the 100 and 300, in that the 500 had a parallel ALU and the 400 was serial. The Argus 400 had an add time (two 24 bit numbers) of 12 μs. The Argus 500 (with 1 μs store) took 3 μs. Divide (the longest instruction) took 156 μs on the Argus 400 and the Argus 500 took 9 μs. The Argus 500 was of course much more expensive.